发明名称 SYSTEM ERROR ANALYSIS METHOD AND THE DEVICE USING THE SAME
摘要 A system error analysis device which includes a top unit and a storage unit coupled to the top module is mentioned. The storage unit is configured to store each of the input data, each of the output data and each of the bus data transmitted by the top unit. When receiving an interrupting signal, the system error analysis device outputs the input data, the output data and the bus data stored as soon as the interrupting signal is received and the input data, the output data and the bus data stored before the receiving of the interrupting signal. Accordingly, by comparing and analyzing the data output by system error analysis device, the system employing the system error analysis device is able to obtain the reason of the generation of the interrupting signal.
申请公布号 US2013166957(A1) 申请公布日期 2013.06.27
申请号 US201213433556 申请日期 2012.03.29
申请人 CHEN CHIA-HSIANG;INVENTEC CORPORATION 发明人 CHEN CHIA-HSIANG
分类号 G06F11/07 主分类号 G06F11/07
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