发明名称 Lateral power MOSFET device having a liner layer formed along the current path to reduce electric resistance and method for manufacturing the same
摘要 According to one embodiment, a semiconductor device includes a channel formation region of first conductivity type, a first offset region of second conductivity type, a first insulating region, a first liner layer, a first semiconductor region of second conductivity type, a second semiconductor region of second conductivity type, a gate insulating film, and a gate electrode. The first liner layer is provided between the first offset region and the first insulating region. The first semiconductor region of second conductivity type is provided on the side opposite to the channel formation region sandwiching the first insulating region therebetween and having impurity concentration higher than that of the first offset region. The second semiconductor region of second conductivity type is provided on the side opposite to the first semiconductor region sandwiching the channel formation region therebetween and having impurity concentration higher than that of the first offset region.
申请公布号 US8471334(B2) 申请公布日期 2013.06.25
申请号 US201113230325 申请日期 2011.09.12
申请人 IBI TAKAO;KABUSHIKI KAISHA TOSHIBA 发明人 IBI TAKAO
分类号 H01L29/66;H01L21/8238 主分类号 H01L29/66
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