| 摘要 |
<P>PROBLEM TO BE SOLVED: To perform a design for reducing the power consumption of a hardware-software collaborative system while satisfying the target performance of the system. <P>SOLUTION: A code structure analysis part 101 detects an execution unit of a program code 302 by granularity. A code load analysis part 103 estimates the calculation volume of each of the execution units. A HW-converting target selection part 104 selects, as HW-converting targets, execution units whose calculation volumes each exceeds a predetermined threshold ratio to the entire calculation volume of the program code 302 in an ascending order of granularity. A HW block synthesis part 106 synthesizes the selected execution unit as a HW block on a reconfigurable circuit 204. In accordance with the synthesis result, a HW/SW collaborative operation part 108 configures a target system 200 as a HW/SW collaborative system, causes process-target data 304 to be processed and measures an actual system performance at the processing. A HW/SW design completion determination part 110 determines to be a design complete in the case of determining that the actually measured performance has realized the target performance. <P>COPYRIGHT: (C)2013,JPO&INPIT |
