| 摘要 |
A substrate for a thin film transistor and a manufacturing method thereof are provided to minimize signal delay of a data line by preventing a line width of the data line from being shortened in the process of patterning a data interconnection layer. A semiconductor layer(120) is formed on an insulation substrate, and is divided into a high-concentration impurity region, a low-concentration impurity region and a channel region. A gate insulating layer(130) is formed on the semiconductor layer, and has a first gate contact(161) and a second gate contact(162). A barrier layer(150) is formed on the first and second contacts. A gate electrode(142) is formed on a portion corresponding to the channel region over the gate insulating layer. A protective layer(160) is formed on the gate electrode, and has a first protective layer contact and a second protective layer contact. A pixel electrode(171) and a data lower layer(172) are formed on the protective layer, and contacts the barrier layer via the first and second protective layer contacts. |
