发明名称 INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide an integrated circuit capable of equalizing the reception quality between ACK and NACK. <P>SOLUTION: The integrated circuit controls: a diffusion processing in which an ACK or NACK symbol is multiplied by an orthogonal sequence and a sequence defined by a cyclic shift amount; a scrambling processing in which the ACK or NACK symbol is multiplied by 1 or e<SP POS="POST">j(&pi;/2)</SP>; and a transmission processing in which the orthogonal sequence and the sequence defined by the cyclic shift amount are multiplied, and the ACK or the NACK symbol multiplied by 1 or e<SP POS="POST">j(&pi;/2)</SP>is transmitted. When the cyclic shift amount defining the sequence to be multiplied by the ACK or NACK symbol is either one of the two cyclic shift amounts neighboring at a predetermined interval which are associated with one orthogonal sequence in the plural orthogonal sequences, the scrambling processing multiplies the ACK or the NACK symbol by 1. When the cyclic shift amount defining the sequence to be multiplied with the ACK or NACK symbol is the other in the two cyclic shift amounts, the scrambling processing multiplies the ACK or NACK symbol with e<SP POS="POST">j(&pi;/2)</SP>. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013123251(A) 申请公布日期 2013.06.20
申请号 JP20130015307 申请日期 2013.01.30
申请人 PANASONIC CORP 发明人 NAKAO SEIGO;IMAMURA DAICHI
分类号 H04B1/707;H04J13/16;H04B1/7097;H04J11/00;H04L1/16;H04W24/02;H04W72/04 主分类号 H04B1/707
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