| 摘要 |
An electronic circuit (100) simulating the behaviour of an inductance between a respective input node (IN) and a reference potential (GND) is described, said electronic circuit (100) comprising: an compensation network (10) having a respective input terminal (11) electrically connected to the input node (IN) of the electronic circuit (100) and a respective output terminal (12), said compensation network (10) being electrically connected between said reference potential (GND) and a further reference potential (VCC); - an inverting amplification stage (20) having a respective input terminal (21) electrically connected to the output terminal (12) of the compensation network (10), and a respective output terminal (22) electrically connected to the input node of the electronic circuit (100), said inverting amplification stage (20) being electrically connected between the further reference potential (VCC) and the reference potential (GND), said inverting amplification stage (20) comprising a transistor (Q1) having a control terminal (TC) operatively connected to the input terminal (21) of the inverting amplification stage (20), a first bias terminal (TP1) operatively connected to the output terminal (22) of the inverting amplification stage (20), a second bias terminal (TP2) operatively connected to the reference potential (GND). The electronic circuit (100) is characterized in that said inverting amplification stage (20) comprises a feedback capacitance (C1) interposed between the first bias terminal (TP1) and the control terminal (TC), respectively, of the transistor (Ql), and a feedback inductance (L1) interposed between the second bias terminal (TP2) of the transistor (Q1) and the reference potential (GND). |
