发明名称 MULTI-CORE PROCESSOR WITH INTERNAL VOTING-BASED BUILT IN SELF TEST (BIST)
摘要 A method and circuit arrangement utilize scan logic disposed on a multi-core processor integrated circuit device or chip to perform internal voting-based built in self test (BIST) of the chip. Test patterns are generated internally on the chip and communicated to the scan chains within multiple processing cores on the chip. Test results output by the scan chains are compared with one another on the chip, and majority voting is used to identify outlier test results that are indicative of a faulty processing core. A bit position in a faulty test result may be used to identify a faulty latch in a scan chain and/or a faulty functional unit in the faulty processing core, and a faulty processing core and/or a faulty functional unit may be automatically disabled in response to the testing.
申请公布号 US2013159799(A1) 申请公布日期 2013.06.20
申请号 US201113330921 申请日期 2011.12.20
申请人 BROWN JEFFREY D.;COMPARAN MIGUEL;SHEARER ROBERT A.;WATSON, III ALFRED T.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BROWN JEFFREY D.;COMPARAN MIGUEL;SHEARER ROBERT A.;WATSON, III ALFRED T.
分类号 G01R31/3177;G06F11/25 主分类号 G01R31/3177
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