发明名称 MULTI-PHASE CLOCK GENERATION APPARATUS AND METHOD
摘要 A multi-phase clock generator may receive an input clock signal as an input. The clock generator may also receive an inverse of the input clock signal. The clock generator may produce a plurality of output clock signals having different phases. The phases of the output clock signals may be evenly spaced. The output clock signals may have a similar waveform to the input clock signal, with a frequency that is lower than the input clock signal by a division factor.
申请公布号 US2013154691(A1) 申请公布日期 2013.06.20
申请号 US201113330648 申请日期 2011.12.19
申请人 LI SHENGGAO;NICHOLSON ROAN M. 发明人 LI SHENGGAO;NICHOLSON ROAN M.
分类号 H03H11/16;H03B19/00 主分类号 H03H11/16
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