PROVIDING CAPACITY GUARANTEES FOR HARDWARE TRANSACTIONAL MEMORY SYSTEMS USING FENCES

摘要

A method is provided that includes determining a number of outstanding out-of-order instructions in an instruction stream. The method includes determining a number of available hardware resources for executing out-of-order instructions and inserting fencing instructions into the instruction stream if the number of outstanding out-of-order instructions exceeds the determined number of available hardware resources. A second method is provided for compiling source code that includes determining a speculative region. The second method includes generating machine-level instructions and inserting fencing instructions into the machine-level instructions in response to determining the speculative region. A processing device is provided that includes cache memory and a processing unit to execute processing device instructions in an instruction stream. The processing device includes an out-of-order speculation supervisor unit to determine hardware resource availability and generate an indication to insert fencing instructions in response to the availability. Computer readable storage media are also provided.