| 摘要 |
A variable resistance memory device comprises a bit line extended in a first direction, a vertical electrode extended vertically in a third direction and configured to be vertically aligned with the bit line in the third direction, a variable resistance layer disposed on a part of the vertical electrode, multiple word lines disposed on the variable resistance layer and stacked in the third direction, wherein each of multiple word lines are extended in a second direction, and a selection transistor including a first dopant injection region electrically connected to the vertical electrode, and a second dopant injection region electrically connected to the bit line. |
