发明名称 Logic modification synthesis for high performance circuits
摘要 A method for IC modification is disclosed. The method recognizes an original HDL file prescribing an original logic, an original netlist incorporating the original logic, and a new HDL file prescribing a new logic. The new logic comprises desired logic changes relative to the original logic. If a signal is different between the new HDL file and the original HDL file the method adds a user hint to both the original HDL file and the new HDL file. Using the original HDL file, the original netlist, the new HDL file, and the user hints, the method synthesizes a delta netlist for inserting into the original netlist, whereupon this insertion the original netlist will incorporate the new logic.
申请公布号 US8468477(B2) 申请公布日期 2013.06.18
申请号 US201113096361 申请日期 2011.04.28
申请人 REN HAOXING;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 REN HAOXING
分类号 G06F17/50 主分类号 G06F17/50
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