发明名称 |
Method and apparatus for designing a system on multiple field programmable gate array device types |
摘要 |
A method for designing a system to be implemented on a target device includes generating a register transfer language (RTL) representation of the system from a description of the system without pipelined delays. The RTL representation of the system includes pipelined delays to facilitate timing of the system as implemented on a target device identified by a designer.
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申请公布号 |
US8468476(B1) |
申请公布日期 |
2013.06.18 |
申请号 |
US201113053178 |
申请日期 |
2011.03.21 |
申请人 |
PERRY STEVEN;ALTERA CORPORATION |
发明人 |
PERRY STEVEN |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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