发明名称 |
METHOD AND STRUCTURE FOR PROTECTION AGAINST VIA FAILURE |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method for forming a decoy via and a functional via. <P>SOLUTION: Provided is a semiconductor device comprising: a first interconnect layer having a plurality of metal portions including a first metal portion; a second interconnect layer having plurality of metal portions including a second metal portion; a third interconnect layer having a plurality of metal portions including a third metal portion; a functional via coupled to the first metal portion and the second metal portion; and a decoy via in a protection region around the functional via, the decoy via coupled to the first metal portion and the third metal portion. <P>COPYRIGHT: (C)2013,JPO&INPIT |
申请公布号 |
JP2013120937(A) |
申请公布日期 |
2013.06.17 |
申请号 |
JP20120259248 |
申请日期 |
2012.11.28 |
申请人 |
FREESCALE SEMICONDUCTOR INC |
发明人 |
MEHUL D SHROFF;DOUGLAS M REBER;EDWARD O TRAVIS |
分类号 |
H01L21/82;H01L21/768 |
主分类号 |
H01L21/82 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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