SIMULATION EXECUTION METHOD, PROGRAM AND SYSTEM

摘要

Provided is a technique which improves speed of parallel execution of logical processes without sacrificing accuracy of update timing of data in a parallel discrete event simulation method. The present invention is characterized in executing a logical process for which a longer time lag occurs for receiving than for transmitting for only an initial shift of a predetermined period of before starting an entire simulation. The initial shift is preferably set at half the value of the difference between the time lag for reception and the time lag for transmission. Logical processes which are shifted by only the initial shift of the predetermined period and executed operate by transmitting null messages to one another so that each of the null messages, after a predetermined time lag, arrives at a logical process of a peer, whereupon each of the logical processes further sends a null message to the logical process of the peer at the point when the first-mentioned null message has been received. In this manner, the simulation progresses by performing synchronization by way of the null messages.