发明名称 DESIGN SUPPORT SYSTEM, METHOD AND PROGRAM
摘要 <p>This design support system comprises: a positioning unit for positioning a capacity cell in free space in a cell positioning area of a semiconductor integrated circuit; and an information output unit, which, when a pre-arranged position where a particular logic cell is to be positioned is indicated, calculates the sum total of the capacity of the capacity check area containing the abovementioned position among a plurality of capacity check areas included in the cell positioning area under the assumption that the capacity cell at said position has been removed; calculates the sum total of the required capacity of the capacity check area containing the abovementioned position under the assumption that the abovementioned particular logic cell has been positioned; and outputs information representing the relationship between the sum total of the abovementioned capacity and the sum total of the required capacity calculated with regard to the capacity check area containing the abovementioned position.</p>
申请公布号 WO2013084356(A1) 申请公布日期 2013.06.13
申请号 WO2011JP78585 申请日期 2011.12.09
申请人 FUJITSU LIMITED;KATAGIRI, HIDEAKI 发明人 KATAGIRI, HIDEAKI
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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