发明名称 |
METHODS AND STRUCTURES FOR A VERTICAL PILLAR INTERCONNECT |
摘要 |
<p>In wafer-level chip-scale packaging and flip-chip packaging and assemblies, a solder cap is formed on a vertical pillar. In one embodiment, the vertical pillar overlies a semiconductor substrate. A solder paste, which may be doped with at least one trace element, is applied on a top surface of the pillar structure. A reflow process is performed after applying the solder paste to provide the solder cap.</p> |
申请公布号 |
EP2449582(A4) |
申请公布日期 |
2013.06.12 |
申请号 |
EP20100794642 |
申请日期 |
2010.06.29 |
申请人 |
FLIPCHIP INTERNATIONAL L.L.C. |
发明人 |
BURGESS, GUY F.;CURTIS, ANTHONY;JOHNSON, MICHAEL E;STOUT, GENE;TESSIER, THEODORE G. |
分类号 |
H01L21/60;H01L23/485 |
主分类号 |
H01L21/60 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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