发明名称 Floating point multiplier with first and second partial product shifting circuitry for result alignment
摘要 A floating point multiplier includes a data path in which a plurality of partial products are calculated and then reduced to a first partial product and a second partial product. Shift amount determining circuitry 100 analyzes the exponents of the input operands A and B as well as counting the leading zeros in the fractional portions of these operands to determine an amount of left shift or right shift to be applied by shifting circuitry 200, 202 within the multiplier data path. This shift amount is applied so as to align the partial products so that when they are added they will produce the result C without requiring this to be further shifted. Furthermore, shifting the partial products to the correct alignment in this way in advance of adding these partial products permits injection rounding combined with the adding of the partial products to be employed for cases including subnormal values.
申请公布号 US8463834(B2) 申请公布日期 2013.06.11
申请号 US20090588962 申请日期 2009.11.03
申请人 LUTZ DAVID RAYMOND;ARM LIMITED 发明人 LUTZ DAVID RAYMOND
分类号 G06F7/487;G06F5/01 主分类号 G06F7/487
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