发明名称 Memory erase methods and devices
摘要 Memory devices and erase methods for memories are disclosed, such as those adapted to discharge an erase voltage from a memory block while protecting low voltage string select gate transistors by maintaining the string select gate transistors in a turned on state during discharge.
申请公布号 US8462559(B2) 申请公布日期 2013.06.11
申请号 US201113331185 申请日期 2011.12.20
申请人 YAMADA SHIGEKAZU;TANAKA TOMOHARU;MICRON TECHNOLOGY, INC. 发明人 YAMADA SHIGEKAZU;TANAKA TOMOHARU
分类号 G11C11/34 主分类号 G11C11/34
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