| 摘要 |
A memory access control circuit includes a first internal register, an address transmitting unit that sets a state of the first internal register to a first state to transmit a first address and sets a state of the first internal register to a second state to transmit a second address, a second internal register, a data receiving unit that sets a state of the second internal register to a third state to receive first data corresponding to the first address, performs data processing on the first data without delay, sets a state of the second internal register to a fourth state to receive second data corresponding to the second address, and performs data processing on the second data after delaying the second data by a given delay time, a first backup unit and a second backup unit.
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