| 摘要 |
FIELD: electrical engineering.SUBSTANCE: voltage debooster with a negative dynamic resistance section containing a multilayered silicon structure the layers whereof form serially positioned p-n junctions and contacts; the structure contains at least five layers wherein the carrier lifetime is equal to a value from the interval ?=0.01-1 mcsec; the alloying admixture concentration in the layers is within the interval of 1·10-1·10cm; the layers are designed for the condition h>?D?to be true for at least one layer where his the specified layer thickness, Dis the coefficient of carrier diffusion in the layer, ?is the carrier lifetime in the layer, with the condition h<?D?true for at least one layer of the structure where his the specified layer thickness, Dis the coefficient of carrier diffusion in the layer, ?is the carrier lifetime in the layer.EFFECT: creation of a voltage debooster with a negative dynamic resistance section; increase of the maximum allowable dissipation power at the debooster fixed voltage.8 cl |
