发明名称 MECHANISM FOR CLOCK SYNCHRONIZATION
摘要 A method and apparatus for synchronizing time between a master device and a target device arranged across a network, wherein the target device communicates to the master device through a PCIe interconnect includes transmitting a first message at a first time from the master device to the target device, the first message including a message indicator; and receiving a reply message at a subsequent time from the target device to the master device, the reply message including the message indicator.
申请公布号 US2013145049(A1) 申请公布日期 2013.06.06
申请号 US201313754062 申请日期 2013.01.30
申请人 STANTON KEVIN;HARRIMAN DAVID 发明人 STANTON KEVIN;HARRIMAN DAVID
分类号 H04L29/08 主分类号 H04L29/08
代理机构 代理人
主权项
地址
您可能感兴趣的专利