发明名称 MEMORY SYSTEM AND BLOCK MERGE METHOD
摘要 In one embodiment, the invention provides a memory system including a flash memory device including a plurality of memory blocks implementing a plurality of data blocks, a plurality of log blocks, and a plurality of free blocks. The memory system further includes a flash translation layer maintaining the number of the free blocks to be at least equal to a reference number by converting selected memory blocks among the data and log blocks into free blocks via at least one merge operation during a background period. Additionally, the flash translation layer converts selected ones of the free blocks into data and log blocks, respectively.
申请公布号 US2013145087(A1) 申请公布日期 2013.06.06
申请号 US201313755773 申请日期 2013.01.31
申请人 SAMSUNG ELECTRONICS CO., LTD.;SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO YUL-WON
分类号 G06F12/02 主分类号 G06F12/02
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