发明名称 ERROR CORRECTION AND RECOVERY IN CHAINED MEMORY ARCHITECTURES
摘要 Electronic apparatus, systems, and methods to construct and operate the electronic apparatus and/or systems include a memory unit configured to receive data flow from two directions. The memory unit can be configured serially in a chain with other memory units. The chain can include an error check and correcting unit (ECC). Additional apparatus, systems, and methods are disclosed.
申请公布号 US2013145207(A1) 申请公布日期 2013.06.06
申请号 US201313757432 申请日期 2013.02.01
申请人 MICRON TECHNOLOGY, INC.;MICRON TECHNOLOGY, INC. 发明人 RESNICK DAVID R.
分类号 G06F11/20 主分类号 G06F11/20
代理机构 代理人
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