SYSTEM AND METHOD FOR PERFORMANCE OPTIMIZATION IN USB OPERATIONS
摘要
<p>An apparatus may include a processor and first logic operable on the processor to output a direct memory access (DMA) activity indicator to indicate a current state of activity of direct memory access data transfer operations. The apparatus may further include second logic operable on the processor to determine scheduled DMA activity to be performed; and third logic operable on the processor to output a pre-wake indicator to a controller before the scheduled DMA activity is to be performed, to satisfy both Quality of Service (QOS) and Power saving needs. Other embodiments are disclosed and claimed.</p>
申请公布号
WO2013052112(A4)
申请公布日期
2013.06.06
申请号
WO2012US00474
申请日期
2012.10.03
申请人
INTEL CORPORATION;POR, CHOON, GUN;PHAN, SERN, HONG