Dual power supply memory array with dynamic selection of the lowest voltage

摘要

Disclosed is a memory array (100 figure 1) and associated method in which the lower of two supply voltages Vdd, Vcs from two power supplies is dynamically selected for bitline pre-charge operations. In the memory array, a voltage comparator (160 figure 3) compares the first supply voltage on a first power supply rail Vdd to a second supply voltage Vcs on a second power supply rail and outputs a voltage difference signal 165. If the voltage difference signal has a first value indicating that the first supply voltage is equal to or less than the second supply voltage, then a control circuit 150a ensures that the complementary bitlines 111a 111b connected to a memory cell 110 are pre-charged to the first supply voltage Vdd. If the voltage difference signal has a second value indicating that the first supply voltage is greater than the second supply voltage, then the control circuit ensures that the complementary bitlines are pre-charged to the second supply voltage Vcs. The selection process avoids stability faults due to power supply variation and noise, whilst allowing for reduced power consumption.