发明名称 SUBTRACTIVE PATTERNING TO DEFINE CIRCUIT COMPONENTS
摘要 <p>Certain embodiments pertain to local interconnects formed by subtractive patterning of blanket layer of tungsten or other conductive material. The grain sizes of tungsten or other deposited metal can be grown to relatively large dimensions, which results in increased electrical conductivity due to, e.g., reduced electron scattering at grain boundaries as electrons travel from one grain to the next during conduction.</p>
申请公布号 SG189225(A1) 申请公布日期 2013.05.31
申请号 SG20130024484 申请日期 2011.10.04
申请人 NOVELLUS SYSTEMS, INC. 发明人 DANEK, MICHAL;GAO, JUWEN;POWELL, RONALD, A.;FELLIS, AARON, R.
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