| 摘要 |
A mechanism for providing retention mode voltage to a memory storage array includes a resistor coupled between a power supply and a power rail of the storage array. The power rail may distribute an operating current to the bit cells of the storage array. The resistor may provide a path for current to the power rail from the power supply during operation in a retention mode. In addition, a switching device coupled between the power supply and the power rail, in parallel with the resistor, may convey operational current to the power rail from the power supply during operation in a normal mode.
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