发明名称 |
MEMORY ACCESS CONTROLLER, DATA PROCESSING SYSTEM, AND METHOD FOR MANAGING DATA FLOW BETWEEN A MEMORY UNIT AND A PROCESSING UNIT |
摘要 |
A memory access controller (16) for managing data flow between a memory unit (14) and a processing unit (12) is described. The memory access controller comprises an addressing unit (20) and an unpacking unit (22, 44). The addressing unit may receive an address from said processing unit and select a data location within said memory unit in dependence on that address. The unpacking unit may read a first word (W1) from the selected data location, unpack the first word into a second word by applying a data conversion scheme which depends on the received address, and provide the second word to the processing unit. The data conversion scheme may comprise, for at least one possible address, a pixel format conversion. A data processing system and a method are also proposed. |
申请公布号 |
WO2013076523(A1) |
申请公布日期 |
2013.05.30 |
申请号 |
WO2011IB03199 |
申请日期 |
2011.11.24 |
申请人 |
FREESCALE SEMICONDUCTOR, INC.;STAUDENMAIER, MICHAEL;AUBINEAU, VINCENT;FRANK, JUERGEN |
发明人 |
STAUDENMAIER, MICHAEL;AUBINEAU, VINCENT;FRANK, JUERGEN |
分类号 |
G06F13/16 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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