| 摘要 |
<P>PROBLEM TO BE SOLVED: To minimize an area occupied by a current path for data, and also suppress a decrease in an operation speed. <P>SOLUTION: A semiconductor device 10 includes an interface chip IF and a plurality of core chips which are stacked with each other, and a current path for data for connecting each of the interface chip IF and the plurality of core chips. The interface chip IF has a command decoder 32 for simultaneously supplying read commands to the plurality of core chips. Each of the plurality of core chips includes a memory cell array 50, a layer address generating circuit 46 for storing a layer address LID assigned to the core chips, and a data control circuit 54 for reading read data from the memory cell array 50 in response to the read command, and outputting the read data to the interface chip IF through the current path for the data at timing corresponding to the layer address LID stored in the layer address generating circuit 46. <P>COPYRIGHT: (C)2013,JPO&INPIT |
