发明名称 SEMICONDUCTOR MEMORY DEVICE AND READ WAIT TIME ADJUSTMENT METHOD THEREOF, MEMORY SYSTEM, AND SEMICONDUCTOR DEVICE
摘要 A controller includes a set of first terminals to be coupled to a device that is under control of the controller, and a control circuit configured to generate and output onto the set of first terminals edge specifying information that takes a selected one of first and second states, the edge specifying information being supplied to the device to cause the device to activate a data strobe signal at a first timing when the selected one of the edge specifying information is the first state and at a second timing, that is different from the first timing, when the edge specifying information is the second state, the control circuit being further configured to generate and output onto the set of first terminals a read command, the read command being supplied to the device to cause the device to return to the controller a data signal.
申请公布号 US2013135950(A1) 申请公布日期 2013.05.30
申请号 US201313748466 申请日期 2013.01.23
申请人 ELPIDA MEMORY, INC.;ELPIDA MEMORY, INC. 发明人 KOSHIZUKA ATSUO
分类号 G11C8/18 主分类号 G11C8/18
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