| 摘要 |
The present invention discloses a multi-stage sample and hold (S/H) circuit that includes: a first S/H circuit for sampling a sensing signal of a sensor multiple times and accumulating them into a first sampled signal, and outputting the first sampled signal; and a second S/H circuit for receiving the plurality of first sampled signals and accumulating them into a second sampled signal. As a result, when one or more first sampled signals are saturated due to instantaneous noise, the second sampled signal is not saturated, thereby increasing the noise tolerance of the multi-stage S/H circuit.
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