| 摘要 |
<p>The nonvolatile latch circuit (100) according to the present invention is equipped with: a latching operation unit in which outputs of cross-coupled inverters (20, 21) are connected together via a series circuit which is constructed with a transistor (6), a variable resistance component (1), and a transistor (7) in said order, and storing and restoring of a latched state are controlled through control terminals of the transistors (6 and 7); and a comparator circuit (23) that compares a signal which is obtained by amplifying the sum of the potentials on either side of the variable resistance component (1) with a logical state of the latching operation unit. Writing to and reading from the variable resistance component (1) are repeated until the output of the comparator circuit (23) indicates an execution of normal writing.</p> |
