SEMICONDUCTOR DEVICE HAVING DUAL DAMASCENE METALLIZATION STRUCTURE
摘要
PURPOSE: A semiconductor device including a dual damascene wiring structure is provided to implement a thin thickness by chemically combining a top seed layer with a top interlayer dielectric layer to form a top barrier layer. CONSTITUTION: A bottom conductive layer(170) is electrically connected to a device layer(120). A bottom barrier layer(160) is located on the sidewall and the bottom of the bottom conductive layer. A top conductive layer(190) is located on the bottom conductive layer. A top barrier layer(180) is located on the sidewall and the bottom of the top conductive layer. The top barrier layer includes a material which is different from the material of the bottom barrier layer.
申请公布号
KR20130056014(A)
申请公布日期
2013.05.29
申请号
KR20110121732
申请日期
2011.11.21
申请人
SAMSUNG ELECTRONICS CO., LTD.
发明人
YUN, JONG HO;CHOI, GIL HEYUN;MATSUDA TSUKASA;JUNG, EUN JI