发明名称 |
Method for efficient generation of a fletcher checksum using a single SIMD pipeline |
摘要 |
The generation of Fletcher/Alder partial checksums are transformed from a space that requires integer multiplications and additions to a space that requires only integer additions and shifts on a single SIMD pipeline capable processor. This transformation permits the use of Fletcher/Alder checksums on processors where the performance of SIMD instructions are sub-optimal, on CMT processors that support a single SIMD pipeline as well as other processors that can be configured by executing software to implement SIMD operations for a single SIMD pipeline. The implementation of the process with this transformation on a general-purpose computer system transforms that general-purpose computer system into a special-purpose computer system that uses a single SIMD pipeline to generate a Fletcher/Alder checksum. The elimination of integer multiplications in the generation of the partial checksums results in a significant improvement in performance.
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申请公布号 |
US8453035(B1) |
申请公布日期 |
2013.05.28 |
申请号 |
US201213344380 |
申请日期 |
2012.01.05 |
申请人 |
SPRACKLEN LAWRENCE A.;ORACLE AMERICA, INC. |
发明人 |
SPRACKLEN LAWRENCE A. |
分类号 |
H03M13/00;G06F9/38 |
主分类号 |
H03M13/00 |
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