发明名称 |
CORRELATION-BASED BACKGROUND CALIBRATION FOR REDUCING INTER-STAGE GAIN ERROR AND NON-LINEARITY IN PIPELINED ANALOG-TO-DIGITAL CONVERTERS |
摘要 |
A method and a corresponding device for calibrating a pipelined analog-to-digital converter (ADC) involve injecting a randomly determined amount of dither into one of a flash component and a multiplying digital-to-analog converter (MDAC) in at least one stage in the ADC. For each stage of the at least one stage a correlation procedure is performed to estimate, based on an output of the ADC, an amount of gain experienced by the injected dither after propagating through the stage. The stage is then calibrated based on its respective gain estimate. |
申请公布号 |
WO2013074192(A1) |
申请公布日期 |
2013.05.23 |
申请号 |
WO2012US54740 |
申请日期 |
2012.09.12 |
申请人 |
ANALOG DEVICES, INC.;ALI, AHMED MOHAMMED, ABDELATTY |
发明人 |
ALI, AHMED MOHAMMED, ABDELATTY |
分类号 |
H03M1/20 |
主分类号 |
H03M1/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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