发明名称 METHODS OF TESTING INTEGRATED CIRCUIT DEVICES USING FUSE ELEMENTS
摘要 Methods of fabricating integrated circuit devices utilize fuse elements to support sequential testing of vertically-integrated test elements during fabrication. These methods include forming a first test element, a first fuse and a first test pad electrically connected by the first fuse to the first test element, on a substrate. The first test element is tested by passing a first current between the first test element and first test pad and through the first fuse. The first fuse is then "cut" by increasing an impedance of the first fuse, which may include breaking the first fuse to create an electrical "open" (infinite impedance) or greatly increasing a resistance of the first fuse (e.g., by narrowing the fuse through electromigration). A second test element and a second test pad, which is electrically connected to the second test element and the first test pad, are then formed on the substrate.
申请公布号 US2013130415(A1) 申请公布日期 2013.05.23
申请号 US201113300274 申请日期 2011.11.18
申请人 AHN JEONG-HOON;CHOI HYUN-MIN;OGUNSOLA OLUWAFEMI O.;SAMSUNG ELECTRONICS CO., LTD. 发明人 AHN JEONG-HOON;CHOI HYUN-MIN;OGUNSOLA OLUWAFEMI O.
分类号 H01L21/66 主分类号 H01L21/66
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