发明名称 Analog Pre-distortion Linearizer
摘要 An analog pre-distortion linearizer having predetermined gain and phase characteristics as a function of input RF signal power is disclosed. The linearizer comprises a core circuit comprising an input terminal configured to receive an input RF signal; an output terminal configured to provide a processed version of that signal; a transistor having a gate, a drain, and a source; and a feedback circuit, presenting an impedance at the frequency of the RF signal, connected to the transistor. The gate is connected to the input terminal and the drain is connected to the output terminal. First and second dc bias voltages applied to the gate and drain respectively cause the transistor to operate at a quiescent bias point in a saturated region of the transistor I-V plane. The quiescent bias point and the impedance are selected such that the linearizer has the predetermined gain and phase characteristics.
申请公布号 US2013127541(A1) 申请公布日期 2013.05.23
申请号 US201213417246 申请日期 2012.03.11
申请人 KHANDAVALLI CHANDRA 发明人 KHANDAVALLI CHANDRA
分类号 H03F1/26 主分类号 H03F1/26
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