发明名称 Accelerated Cyclical Redundancy Check
摘要 The disclosure relates generally to the field of communications in transceiver, and more particularly to improved strategies for Cyclical Redundancy Check (CRC). A CRC check of a codeblock may be initiated by a CRC decoder before receiving all of the bits by a corresponding FEC encoder. Furthermore, an incremental CRC check with respect to the data packet without the need for requesting passed through data from higher layers.
申请公布号 US2013132796(A1) 申请公布日期 2013.05.23
申请号 US201213434552 申请日期 2012.03.29
申请人 VUMMINTALA SHASHIDHAR;VELAYOUDAME ARUMUGAM;SOMICHETTY GOWRISANKAR;RAJAGOPAL SRIRAM;SOLANKI SANDIP;KRISHNAN KALYANA;BROADCOM CORPORATION 发明人 VUMMINTALA SHASHIDHAR;VELAYOUDAME ARUMUGAM;SOMICHETTY GOWRISANKAR;RAJAGOPAL SRIRAM;SOLANKI SANDIP;KRISHNAN KALYANA
分类号 H03M13/09;G06F11/10;H03M13/29 主分类号 H03M13/09
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