发明名称 |
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE |
摘要 |
A first semiconductor chip and a second semiconductor chip are overlapped with each other in a direction in which a first multilayer interconnect layer and a second multilayer interconnect layer are opposed to each other. When seen in a plan view, a first inductor and a second inductor are overlapped. The first semiconductor chip and the second semiconductor chip have non-opposed areas which are not opposed to each other. The first multilayer interconnect layer has a first external connection terminal in the non-opposed area, and the second multilayer interconnect layer has a second external connection terminal in the non-opposed area. |
申请公布号 |
US2013130442(A1) |
申请公布日期 |
2013.05.23 |
申请号 |
US201313741910 |
申请日期 |
2013.01.15 |
申请人 |
RENESAS ELECTRONICS CORPORATION;RENESAS ELECTRONICS CORPORATION |
发明人 |
NAKASHIBA YASUTAKA;OGAWA KENTA |
分类号 |
H01L21/56 |
主分类号 |
H01L21/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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