发明名称 ADDRESS OUTPUT CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: An address output circuit and a semiconductor memory device are provided to reduce a layout area by decreasing the number of pulse signal generating units. CONSTITUTION: A signal generating unit(1) generates a toggling signal and first and second pulse signals in response to a test signal and a burst pulse signal. An address output unit(6) receives first to fourth input addresses and outputs first to fourth output addresses in response to the toggling signal and the first and second pulse signals. A repair unit(7) repairs a word line selected by the first to fourth output addresses. [Reference numerals] (1) Signal generating unit; (6) Address output unit; (7) Repair unit
申请公布号 KR20130051839(A) 申请公布日期 2013.05.21
申请号 KR20110117213 申请日期 2011.11.10
申请人 SK HYNIX INC. 发明人 PARK, SANG IL
分类号 G11C29/18 主分类号 G11C29/18
代理机构 代理人
主权项
地址