发明名称 Determining intra-die wirebond pad placement locations in integrated circuit
摘要 Solutions for determining intra-die wirebond pad placement locations in an integrated circuit (IC) die are disclosed. In one embodiment, a method includes generating a dividing band in the IC die, the dividing band dividing the IC die into a first region and a second region; determining a voltage (IR) drop across the first region and the second region; comparing the IR drops across the regions; and in response to the IR drops being substantially unequal, moving the dividing band, determining new IR drops across the regions, and comparing the new IR drops until the IR drops are substantially equal. The dividing band may provide desired locations for intra-die wirebond pads.
申请公布号 US8448118(B2) 申请公布日期 2013.05.21
申请号 US201113032059 申请日期 2011.02.22
申请人 GRAF RICHARD S.;ITOH HARUO;CHUNG-MALONEY WAI LING;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GRAF RICHARD S.;ITOH HARUO;CHUNG-MALONEY WAI LING
分类号 G06F17/50 主分类号 G06F17/50
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