发明名称 |
Source and drain feature profile for improving device performance |
摘要 |
An integrated circuit device is disclosed. The disclosed device provides improved control over a surface proximity and tip depth of integrated circuit devices. An exemplary integrated circuit device disclosed herein has a surface proximity of about 1 nm to about 3 nm and a tip depth of about 5 nm to about 10 nm. The integrated circuit device having such surface proximity and tip depth includes an epi source feature and an epi drain feature defined by a first facet and a second facet of a substrate in a first direction, such as a {111} crystallographic plane of the substrate, and a third facet of the substrate in a second direction, such as a {100} crystallographic plane of the substrate.
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申请公布号 |
US8445940(B2) |
申请公布日期 |
2013.05.21 |
申请号 |
US201213543943 |
申请日期 |
2012.07.09 |
申请人 |
TSAI MING-HUAN;OUYANG HUI;CHENG CHUN-FAI;FAN WEI-HAN;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
TSAI MING-HUAN;OUYANG HUI;CHENG CHUN-FAI;FAN WEI-HAN |
分类号 |
H01L31/072 |
主分类号 |
H01L31/072 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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