发明名称 FLEXIBLE RECEIVER ARCHITECTURE
摘要 <P>PROBLEM TO BE SOLVED: To provide circuitry for high-speed data links. <P>SOLUTION: A receiver circuit for data links includes: a first signal path including first equalization circuitry; a second signal path including second equalization circuitry; and a path selector circuit configured to select one signal path of the first signal path and the second signal path. In one embodiment, the first signal path includes a decision feedback equalizer circuit. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013098981(A) 申请公布日期 2013.05.20
申请号 JP20120234609 申请日期 2012.10.24
申请人 ALTERA CORP 发明人 WEIQI DING;SURGEY SHUMARAYEV;PENG LEE;SRIRAM NARAYAN
分类号 H04B3/04;H04L1/22 主分类号 H04B3/04
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