| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a memory controller and a memory device advantageous for increasing read operation speed and reliability. <P>SOLUTION: A memory controller 2 comprises: an external interface 1; a first ECC generation section 3a; an access section 4 that controls writing on/reading from memories 7a-7e; a first ECC correction section 3b that corrects error on read error; and a controller 6 that controls the above. The controller 6 reads a piece of data by using a first read unit when reading the piece of data from the memories, and when an error occurs on the data read by the first read unit, reads the piece of data after switching the read unit to a second unit, the read size of which is smaller than that of the first read unit; and controls the first ECC correction section to perform an error correction on the data read by the second read unit by using the first ECC code. <P>COPYRIGHT: (C)2013,JPO&INPIT |
