发明名称 UNDER BUMP WIRING LAYER METHOD AND APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To provide various semiconductor chip conductor structures and methods of fabricating the same. <P>SOLUTION: An apparatus is provided which comprises a semiconductor chip including at least first and second rearrangement layer structures, an under bump metalization (UBM) structure including first and second sites, a polymer layer disposed in the UBM structure, and a solder structure disposed on the UBM structure. The UBM structure on one curved surface includes a hub 1400 and a cluster 1260 including the first and second sites connected to the hub 1400. The first site is connected to a first rearrangement layer structure 1245 and the second site is connected to a second rearrangement layer structure 1235, respectively, electrically. Furthermore, the solder structure 1450 is disposed on the UBM structure while being positioned partially on the polymer layer. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013093630(A) 申请公布日期 2013.05.16
申请号 JP20130030065 申请日期 2013.02.19
申请人 ATI TECHNOLOGIES ULC 发明人 NEIL MCLAREN;LI YUE;TOPACIO RAUDEN;CHEUNG TERENCE
分类号 H01L23/12 主分类号 H01L23/12
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