发明名称 |
DEVICE AND METHOD TO PERFORM MEMORY OPERATIONS AT A CLOCK DOMAIN CROSSING |
摘要 |
A device and method to perform memory operations at a clock domain crossing is disclosed. In a particular embodiment, a method includes providing a first clock signal to a write clock input of a memory to write data to the memory. The data is read from the memory according to a second clock signal that is different from the first clock signal. A third clock signal is provided to a read clock input of the memory. The third clock signal has a frequency that is substantially an integer multiple of a frequency of the second clock signal. The integer multiple is greater than one.
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申请公布号 |
US2013121100(A1) |
申请公布日期 |
2013.05.16 |
申请号 |
US201113294944 |
申请日期 |
2011.11.11 |
申请人 |
DEIVASIGAMANI VINOTH KUMAR;QUALCOMM INCORPORATED |
发明人 |
DEIVASIGAMANI VINOTH KUMAR |
分类号 |
G11C8/18 |
主分类号 |
G11C8/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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