发明名称 Low-latency multichannel video port aggregator
摘要 A video port aggregator receives plural asynchronous video data streams. Corresponding input buffers generate video data and a status signal. A memory controller writes the video data in corresponding locations within an external memory. A channel triggers the memory controller to read data out of the external memory for transmission to a single video output port when said corresponding status signal indicates receipt of a predetermined portion of data. This read out of the external memory being faster than the writing. The channel sequencer triggers the memory controller to read data out of the external memory video data of a highest priority asynchronous video data stream having a received next portion of data.
申请公布号 US8443413(B2) 申请公布日期 2013.05.14
申请号 US20080334807 申请日期 2008.12.15
申请人 HIERS TODD C.;TEXAS INSTRUMENTS INCORPORATED 发明人 HIERS TODD C.
分类号 H04N7/173 主分类号 H04N7/173
代理机构 代理人
主权项
地址