| 摘要 |
An exponentiation circuit for computing an exponential power of a finite field element includes combinatory logic circuits that map input digits of a multi-digit field element beta to output digits of an output multi-digit field element beta2m. The exponentiation circuit is capable of computing a power of a field element without performing any multiplication operations and requires only exclusive-OR logic operations to generate the output exponential field element. A circuit for generating a multiplicative inverse of a finite field element can be constructed from a set of parallel exponentiation circuits, with each of the parallel exponentiation circuits generating a different multi-digit field element beta2m directly from the input field element beta. Multiplier circuits multiply together the outputs of the parallel exponentiation circuits to generate the multiplicative inverse of the field element beta. |
