| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce current consumption accompanying delay amount control operation, in an oversampling circuit for sampling multi-phase serial data with multi-phase clocks. <P>SOLUTION: A serial data SDATA is changed to multi-phase serial data sdata0-sdata3 in a data delay unit 102, and oversampled with multi-phase clocks ck0-ck3 in an oversampling unit 103. In regard to the delay time at a data delay element 107 of the data delay unit 102, a phase difference of oversampling outputs of data generated in a calibration data generator unit 101 is detected by an oversampling phase detector unit 105, and a delay amount control digital signal dd_cnt is adjusted in a manner to obtain the phase difference to be a desired value. The delay amount control digital signal dd_cnt is converted into an analog delay amount generation signal d_cnt by a digital-to-analog converter unit 106, and is supplied to the data delay element 107. <P>COPYRIGHT: (C)2013,JPO&INPIT |
