| 摘要 |
<P>PROBLEM TO BE SOLVED: To obtain a memory controller capable of suppressing increase of parity data. <P>SOLUTION: A memory controller controls a nonvolatile semiconductor memory having memory cells each having three bits of data assigned to each threshold distribution and including a first bit representing first page data, a second bit representing second page data, and a third bit representing third page data. The memory controller comprises: a control unit that generates a virtual page by extracting an error bit caused by transmission to an adjoining threshold distribution from the first bit and the second bit of data to be written into each memory cell in a first memory area when data for three pages including the first through the third pages is written in the first memory area of the nonvolatile semiconductor memory; a coding unit that generates a first error correcting code on the virtual page, and an interface unit that writes the data for three pages and the first error correcting code into the nonvolatile semiconductor memory. <P>COPYRIGHT: (C)2013,JPO&INPIT |
